2023-11-03 20:35:05 +01:00
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#pragma once
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#include "ggml.h"
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// GGML internal header
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#include <assert.h>
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2024-01-04 09:12:26 +01:00
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#include <stdlib.h> // load `stdlib.h` before other headers to work around MinGW bug: https://sourceforge.net/p/mingw-w64/bugs/192/
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2023-11-03 20:35:05 +01:00
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#include <stddef.h>
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#include <stdbool.h>
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#include <string.h> // memcpy
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#include <math.h> // fabsf
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2024-04-25 14:12:28 +02:00
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#undef MIN
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#undef MAX
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#define MIN(a, b) ((a) < (b) ? (a) : (b))
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#define MAX(a, b) ((a) > (b) ? (a) : (b))
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2024-05-20 04:18:39 +02:00
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#if defined(_WIN32)
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#define m512bh(p) p
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#define m512i(p) p
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#else
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#define m512bh(p) (__m512bh)(p)
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#define m512i(p) (__m512i)(p)
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#endif
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2024-05-08 08:30:09 +02:00
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/**
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* Converts brain16 to float32.
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*
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* The bfloat16 floating point format has the following structure:
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*
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* ┌sign
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* │
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* │ ┌exponent
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* │ │
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* │ │ ┌mantissa
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* │ │ │
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* │┌──┴───┐┌─┴───┐
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* 0b0000000000000000 brain16
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*
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* Since bf16 has the same number of exponent bits as a 32bit float,
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* encoding and decoding numbers becomes relatively straightforward.
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*
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* ┌sign
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* │
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* │ ┌exponent
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* │ │
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* │ │ ┌mantissa
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* │ │ │
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* │┌──┴───┐┌─┴───────────────────┐
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* 0b00000000000000000000000000000000 IEEE binary32
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*
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* For comparison, the standard fp16 format has fewer exponent bits.
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*
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* ┌sign
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* │
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* │ ┌exponent
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* │ │
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* │ │ ┌mantissa
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* │ │ │
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* │┌─┴─┐┌─┴──────┐
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* 0b0000000000000000 IEEE binary16
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*
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* @see IEEE 754-2008
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*/
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static inline float ggml_compute_bf16_to_fp32(ggml_bf16_t h) {
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union {
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float f;
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uint32_t i;
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} u;
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u.i = (uint32_t)h.bits << 16;
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return u.f;
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}
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/**
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* Converts float32 to brain16.
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*
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* This function is binary identical to AMD Zen4 VCVTNEPS2BF16.
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* Subnormals shall be flushed to zero, and NANs will be quiet.
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* This code should vectorize nicely if using modern compilers.
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*/
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static inline ggml_bf16_t ggml_compute_fp32_to_bf16(float s) {
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ggml_bf16_t h;
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union {
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float f;
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uint32_t i;
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} u;
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u.f = s;
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if ((u.i & 0x7fffffff) > 0x7f800000) { /* nan */
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h.bits = (u.i >> 16) | 64; /* force to quiet */
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return h;
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}
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if (!(u.i & 0x7f800000)) { /* subnormal */
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h.bits = (u.i & 0x80000000) >> 16; /* flush to zero */
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return h;
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}
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h.bits = (u.i + (0x7fff + ((u.i >> 16) & 1))) >> 16;
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return h;
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}
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#define GGML_FP32_TO_BF16(x) ggml_compute_fp32_to_bf16(x)
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#define GGML_BF16_TO_FP32(x) ggml_compute_bf16_to_fp32(x)
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2023-11-03 20:35:05 +01:00
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#ifdef __cplusplus
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extern "C" {
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#endif
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// static_assert should be a #define, but if it's not,
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// fall back to the _Static_assert C11 keyword.
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// if C99 - static_assert is noop
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// ref: https://stackoverflow.com/a/53923785/4039976
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2024-02-05 13:09:47 +01:00
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#ifndef __cplusplus
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2023-11-03 20:35:05 +01:00
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#ifndef static_assert
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#if defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 201100L)
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#define static_assert(cond, msg) _Static_assert(cond, msg)
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#else
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#define static_assert(cond, msg) struct global_scope_noop_trick
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#endif
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#endif
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2024-02-05 13:09:47 +01:00
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#endif
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2023-11-03 20:35:05 +01:00
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// __FMA__ and __F16C__ are not defined in MSVC, however they are implied with AVX2/AVX512
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#if defined(_MSC_VER) && (defined(__AVX2__) || defined(__AVX512F__))
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#ifndef __FMA__
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#define __FMA__
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#endif
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#ifndef __F16C__
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#define __F16C__
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#endif
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2024-05-08 17:33:43 +02:00
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#endif
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// __SSE3__ and __SSSE3__ are not defined in MSVC, but SSE3/SSSE3 are present when AVX/AVX2/AVX512 are available
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#if defined(_MSC_VER) && (defined(__AVX__) || defined(__AVX2__) || defined(__AVX512F__))
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2023-11-03 20:35:05 +01:00
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#ifndef __SSE3__
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#define __SSE3__
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#endif
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2024-05-08 17:33:43 +02:00
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#ifndef __SSSE3__
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#define __SSSE3__
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#endif
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2023-11-03 20:35:05 +01:00
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#endif
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// 16-bit float
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// on Arm, we use __fp16
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// on x86, we use uint16_t
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2024-04-24 11:00:07 +02:00
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#if defined(__ARM_NEON)
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2023-11-03 20:35:05 +01:00
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// if YCM cannot find <arm_neon.h>, make a symbolic link to it, for example:
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//
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// $ ln -sfn /Library/Developer/CommandLineTools/usr/lib/clang/13.1.6/include/arm_neon.h ./src/
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//
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#include <arm_neon.h>
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2024-04-24 11:00:07 +02:00
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#ifdef _MSC_VER
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typedef uint16_t ggml_fp16_internal_t;
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#define ggml_vld1q_u32(w,x,y,z) { ((w) + ((uint64_t)(x) << 32)), ((y) + ((uint64_t)(z) << 32)) }
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#else
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2024-03-11 10:28:51 +01:00
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typedef __fp16 ggml_fp16_internal_t;
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2024-04-24 11:00:07 +02:00
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#define ggml_vld1q_u32(w,x,y,z) { (w), (x), (y), (z) }
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#endif // _MSC_VER
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#if !defined(__aarch64__)
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// 32-bit ARM compatibility
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// vaddvq_s16
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// vpaddq_s16
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// vpaddq_s32
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// vaddvq_s32
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// vaddvq_f32
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// vmaxvq_f32
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// vcvtnq_s32_f32
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// vzip1_u8
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// vzip2_u8
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inline static int32_t vaddvq_s16(int16x8_t v) {
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return
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(int32_t)vgetq_lane_s16(v, 0) + (int32_t)vgetq_lane_s16(v, 1) +
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(int32_t)vgetq_lane_s16(v, 2) + (int32_t)vgetq_lane_s16(v, 3) +
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(int32_t)vgetq_lane_s16(v, 4) + (int32_t)vgetq_lane_s16(v, 5) +
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(int32_t)vgetq_lane_s16(v, 6) + (int32_t)vgetq_lane_s16(v, 7);
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}
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inline static int16x8_t vpaddq_s16(int16x8_t a, int16x8_t b) {
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int16x4_t a0 = vpadd_s16(vget_low_s16(a), vget_high_s16(a));
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int16x4_t b0 = vpadd_s16(vget_low_s16(b), vget_high_s16(b));
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return vcombine_s16(a0, b0);
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}
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inline static int32x4_t vpaddq_s32(int32x4_t a, int32x4_t b) {
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int32x2_t a0 = vpadd_s32(vget_low_s32(a), vget_high_s32(a));
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int32x2_t b0 = vpadd_s32(vget_low_s32(b), vget_high_s32(b));
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return vcombine_s32(a0, b0);
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}
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inline static int32_t vaddvq_s32(int32x4_t v) {
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return vgetq_lane_s32(v, 0) + vgetq_lane_s32(v, 1) + vgetq_lane_s32(v, 2) + vgetq_lane_s32(v, 3);
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}
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inline static float vaddvq_f32(float32x4_t v) {
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return vgetq_lane_f32(v, 0) + vgetq_lane_f32(v, 1) + vgetq_lane_f32(v, 2) + vgetq_lane_f32(v, 3);
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}
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inline static float vmaxvq_f32(float32x4_t v) {
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return
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MAX(MAX(vgetq_lane_f32(v, 0), vgetq_lane_f32(v, 1)),
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MAX(vgetq_lane_f32(v, 2), vgetq_lane_f32(v, 3)));
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}
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inline static int32x4_t vcvtnq_s32_f32(float32x4_t v) {
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int32x4_t res;
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res[0] = roundf(vgetq_lane_f32(v, 0));
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res[1] = roundf(vgetq_lane_f32(v, 1));
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res[2] = roundf(vgetq_lane_f32(v, 2));
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res[3] = roundf(vgetq_lane_f32(v, 3));
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return res;
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}
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inline static uint8x8_t vzip1_u8(uint8x8_t a, uint8x8_t b) {
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uint8x8_t res;
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res[0] = a[0]; res[1] = b[0];
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res[2] = a[1]; res[3] = b[1];
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res[4] = a[2]; res[5] = b[2];
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res[6] = a[3]; res[7] = b[3];
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return res;
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}
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inline static uint8x8_t vzip2_u8(uint8x8_t a, uint8x8_t b) {
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uint8x8_t res;
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res[0] = a[4]; res[1] = b[4];
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res[2] = a[5]; res[3] = b[5];
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res[4] = a[6]; res[5] = b[6];
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res[6] = a[7]; res[7] = b[7];
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return res;
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}
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// vld1q_s16_x2
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// vld1q_u8_x2
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// vld1q_u8_x4
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// vld1q_s8_x2
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// vld1q_s8_x4
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// TODO: double-check these work correctly
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typedef struct ggml_int16x8x2_t {
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int16x8_t val[2];
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} ggml_int16x8x2_t;
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inline static ggml_int16x8x2_t ggml_vld1q_s16_x2(const int16_t * ptr) {
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ggml_int16x8x2_t res;
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res.val[0] = vld1q_s16(ptr + 0);
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res.val[1] = vld1q_s16(ptr + 8);
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return res;
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}
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typedef struct ggml_uint8x16x2_t {
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uint8x16_t val[2];
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} ggml_uint8x16x2_t;
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inline static ggml_uint8x16x2_t ggml_vld1q_u8_x2(const uint8_t * ptr) {
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ggml_uint8x16x2_t res;
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res.val[0] = vld1q_u8(ptr + 0);
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res.val[1] = vld1q_u8(ptr + 16);
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return res;
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}
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typedef struct ggml_uint8x16x4_t {
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uint8x16_t val[4];
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} ggml_uint8x16x4_t;
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inline static ggml_uint8x16x4_t ggml_vld1q_u8_x4(const uint8_t * ptr) {
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ggml_uint8x16x4_t res;
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res.val[0] = vld1q_u8(ptr + 0);
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res.val[1] = vld1q_u8(ptr + 16);
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res.val[2] = vld1q_u8(ptr + 32);
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res.val[3] = vld1q_u8(ptr + 48);
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return res;
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}
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typedef struct ggml_int8x16x2_t {
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int8x16_t val[2];
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} ggml_int8x16x2_t;
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inline static ggml_int8x16x2_t ggml_vld1q_s8_x2(const int8_t * ptr) {
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ggml_int8x16x2_t res;
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res.val[0] = vld1q_s8(ptr + 0);
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res.val[1] = vld1q_s8(ptr + 16);
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return res;
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}
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typedef struct ggml_int8x16x4_t {
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int8x16_t val[4];
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} ggml_int8x16x4_t;
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inline static ggml_int8x16x4_t ggml_vld1q_s8_x4(const int8_t * ptr) {
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ggml_int8x16x4_t res;
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res.val[0] = vld1q_s8(ptr + 0);
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res.val[1] = vld1q_s8(ptr + 16);
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res.val[2] = vld1q_s8(ptr + 32);
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res.val[3] = vld1q_s8(ptr + 48);
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return res;
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}
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// NOTE: not tested
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inline static int8x16_t ggml_vqtbl1q_s8(int8x16_t a, uint8x16_t b) {
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|
|
int8x16_t res;
|
|
|
|
|
|
|
|
res[ 0] = a[b[ 0]];
|
|
|
|
res[ 1] = a[b[ 1]];
|
|
|
|
res[ 2] = a[b[ 2]];
|
|
|
|
res[ 3] = a[b[ 3]];
|
|
|
|
res[ 4] = a[b[ 4]];
|
|
|
|
res[ 5] = a[b[ 5]];
|
|
|
|
res[ 6] = a[b[ 6]];
|
|
|
|
res[ 7] = a[b[ 7]];
|
|
|
|
res[ 8] = a[b[ 8]];
|
|
|
|
res[ 9] = a[b[ 9]];
|
|
|
|
res[10] = a[b[10]];
|
|
|
|
res[11] = a[b[11]];
|
|
|
|
res[12] = a[b[12]];
|
|
|
|
res[13] = a[b[13]];
|
|
|
|
res[14] = a[b[14]];
|
|
|
|
res[15] = a[b[15]];
|
|
|
|
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
|
|
|
// NOTE: not tested
|
|
|
|
inline static uint8x16_t ggml_vqtbl1q_u8(uint8x16_t a, uint8x16_t b) {
|
|
|
|
uint8x16_t res;
|
|
|
|
|
|
|
|
res[ 0] = a[b[ 0]];
|
|
|
|
res[ 1] = a[b[ 1]];
|
|
|
|
res[ 2] = a[b[ 2]];
|
|
|
|
res[ 3] = a[b[ 3]];
|
|
|
|
res[ 4] = a[b[ 4]];
|
|
|
|
res[ 5] = a[b[ 5]];
|
|
|
|
res[ 6] = a[b[ 6]];
|
|
|
|
res[ 7] = a[b[ 7]];
|
|
|
|
res[ 8] = a[b[ 8]];
|
|
|
|
res[ 9] = a[b[ 9]];
|
|
|
|
res[10] = a[b[10]];
|
|
|
|
res[11] = a[b[11]];
|
|
|
|
res[12] = a[b[12]];
|
|
|
|
res[13] = a[b[13]];
|
|
|
|
res[14] = a[b[14]];
|
|
|
|
res[15] = a[b[15]];
|
|
|
|
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
|
|
|
#else
|
|
|
|
|
|
|
|
#define ggml_int16x8x2_t int16x8x2_t
|
|
|
|
#define ggml_uint8x16x2_t uint8x16x2_t
|
|
|
|
#define ggml_uint8x16x4_t uint8x16x4_t
|
|
|
|
#define ggml_int8x16x2_t int8x16x2_t
|
|
|
|
#define ggml_int8x16x4_t int8x16x4_t
|
|
|
|
|
|
|
|
#define ggml_vld1q_s16_x2 vld1q_s16_x2
|
|
|
|
#define ggml_vld1q_u8_x2 vld1q_u8_x2
|
|
|
|
#define ggml_vld1q_u8_x4 vld1q_u8_x4
|
|
|
|
#define ggml_vld1q_s8_x2 vld1q_s8_x2
|
|
|
|
#define ggml_vld1q_s8_x4 vld1q_s8_x4
|
|
|
|
#define ggml_vqtbl1q_s8 vqtbl1q_s8
|
|
|
|
#define ggml_vqtbl1q_u8 vqtbl1q_u8
|
|
|
|
|
|
|
|
#endif // !defined(__aarch64__)
|
|
|
|
|
|
|
|
#if !defined(__ARM_FEATURE_DOTPROD)
|
|
|
|
|
|
|
|
inline static int32x4_t ggml_vdotq_s32(int32x4_t acc, int8x16_t a, int8x16_t b) {
|
|
|
|
const int16x8_t p0 = vmull_s8(vget_low_s8 (a), vget_low_s8 (b));
|
|
|
|
const int16x8_t p1 = vmull_s8(vget_high_s8(a), vget_high_s8(b));
|
|
|
|
|
|
|
|
return vaddq_s32(acc, vaddq_s32(vpaddlq_s16(p0), vpaddlq_s16(p1)));
|
|
|
|
}
|
|
|
|
|
|
|
|
#else
|
|
|
|
|
|
|
|
#define ggml_vdotq_s32(a, b, c) vdotq_s32(a, b, c)
|
|
|
|
|
|
|
|
#endif // !defined(__ARM_FEATURE_DOTPROD)
|
|
|
|
|
|
|
|
#endif // defined(__ARM_NEON)
|
|
|
|
|
2024-04-29 16:55:02 +02:00
|
|
|
#if defined(__ARM_NEON) && !defined(_MSC_VER)
|
2024-04-24 11:00:07 +02:00
|
|
|
|
2024-02-22 22:21:39 +01:00
|
|
|
#define GGML_COMPUTE_FP16_TO_FP32(x) ggml_compute_fp16_to_fp32(x)
|
|
|
|
#define GGML_COMPUTE_FP32_TO_FP16(x) ggml_compute_fp32_to_fp16(x)
|
|
|
|
|
|
|
|
#define GGML_FP16_TO_FP32(x) ggml_compute_fp16_to_fp32(x)
|
|
|
|
|
|
|
|
static inline float ggml_compute_fp16_to_fp32(ggml_fp16_t h) {
|
2024-03-11 10:28:51 +01:00
|
|
|
ggml_fp16_internal_t tmp;
|
2024-02-22 22:21:39 +01:00
|
|
|
memcpy(&tmp, &h, sizeof(ggml_fp16_t));
|
|
|
|
return (float)tmp;
|
|
|
|
}
|
2023-11-03 20:35:05 +01:00
|
|
|
|
2024-02-22 22:21:39 +01:00
|
|
|
static inline ggml_fp16_t ggml_compute_fp32_to_fp16(float f) {
|
|
|
|
ggml_fp16_t res;
|
2024-03-11 10:28:51 +01:00
|
|
|
ggml_fp16_internal_t tmp = f;
|
2024-02-22 22:21:39 +01:00
|
|
|
memcpy(&res, &tmp, sizeof(ggml_fp16_t));
|
|
|
|
return res;
|
|
|
|
}
|
2023-11-03 20:35:05 +01:00
|
|
|
|
|
|
|
#else
|
|
|
|
|
|
|
|
#ifdef __wasm_simd128__
|
|
|
|
#include <wasm_simd128.h>
|
|
|
|
#else
|
|
|
|
#ifdef __POWER9_VECTOR__
|
|
|
|
#include <altivec.h>
|
|
|
|
#undef bool
|
|
|
|
#define bool _Bool
|
|
|
|
#else
|
|
|
|
#if defined(_MSC_VER) || defined(__MINGW32__)
|
|
|
|
#include <intrin.h>
|
|
|
|
#else
|
ggml : add llamafile sgemm (llama/6414)
This change upstreams llamafile's cpu matrix multiplication kernels
which improve image and prompt evaluation speed. For starters, Q4_0
and Q8_0 weights should go ~40% faster on CPU. The biggest benefits
are with data types like f16 / f32, which process prompts 2x faster
thus making them faster than quantized data types for prompt evals.
This change also introduces bona fide AVX512 support since tinyBLAS
is able to exploit the larger register file. For example, on my CPU
llama.cpp llava-cli processes an image prompt at 305 tokens/second,
using the Q4_K and Q4_0 types, which has always been faster than if
we used f16 LLaVA weights, which at HEAD go 188 tokens/second. With
this change, f16 LLaVA performance leap frogs to 464 tokens/second.
On Intel Core i9-14900K this change improves F16 prompt perf by 5x.
For example, using llama.cpp at HEAD with Mistral 7b f16 to process
a 215 token prompt will go 13 tok/sec. This change has fixes making
it go 52 tok/sec. It's mostly thanks to my vectorized outer product
kernels but also because I added support for correctly counting the
number of cores on Alderlake, so the default thread count discounts
Intel's new efficiency cores. Only Linux right now can count cores.
This work was sponsored by Mozilla who's given permission to change
the license of this code from Apache 2.0 to MIT. To read more about
what's improved, and how it works, see: https://justine.lol/matmul/
2024-04-16 20:55:30 +02:00
|
|
|
#if defined(__AVX__) || defined(__AVX2__) || defined(__AVX512F__) || defined(__SSSE3__) || defined(__SSE3__) || defined(__SSE__)
|
2023-11-03 20:35:05 +01:00
|
|
|
#if !defined(__riscv)
|
|
|
|
#include <immintrin.h>
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef __riscv_v_intrinsic
|
|
|
|
#include <riscv_vector.h>
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef __F16C__
|
|
|
|
|
|
|
|
#ifdef _MSC_VER
|
|
|
|
#define GGML_COMPUTE_FP16_TO_FP32(x) _mm_cvtss_f32(_mm_cvtph_ps(_mm_cvtsi32_si128(x)))
|
|
|
|
#define GGML_COMPUTE_FP32_TO_FP16(x) _mm_extract_epi16(_mm_cvtps_ph(_mm_set_ss(x), 0), 0)
|
|
|
|
#else
|
|
|
|
#define GGML_COMPUTE_FP16_TO_FP32(x) _cvtsh_ss(x)
|
|
|
|
#define GGML_COMPUTE_FP32_TO_FP16(x) _cvtss_sh(x, 0)
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#elif defined(__POWER9_VECTOR__)
|
|
|
|
|
|
|
|
#define GGML_COMPUTE_FP16_TO_FP32(x) ggml_compute_fp16_to_fp32(x)
|
|
|
|
#define GGML_COMPUTE_FP32_TO_FP16(x) ggml_compute_fp32_to_fp16(x)
|
|
|
|
/* the inline asm below is about 12% faster than the lookup method */
|
|
|
|
#define GGML_FP16_TO_FP32(x) GGML_COMPUTE_FP16_TO_FP32(x)
|
|
|
|
#define GGML_FP32_TO_FP16(x) GGML_COMPUTE_FP32_TO_FP16(x)
|
|
|
|
|
|
|
|
static inline float ggml_compute_fp16_to_fp32(ggml_fp16_t h) {
|
|
|
|
register float f;
|
|
|
|
register double d;
|
|
|
|
__asm__(
|
|
|
|
"mtfprd %0,%2\n"
|
|
|
|
"xscvhpdp %0,%0\n"
|
|
|
|
"frsp %1,%0\n" :
|
|
|
|
/* temp */ "=d"(d),
|
|
|
|
/* out */ "=f"(f):
|
|
|
|
/* in */ "r"(h));
|
|
|
|
return f;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline ggml_fp16_t ggml_compute_fp32_to_fp16(float f) {
|
|
|
|
register double d;
|
|
|
|
register ggml_fp16_t r;
|
|
|
|
__asm__( /* xscvdphp can work on double or single precision */
|
|
|
|
"xscvdphp %0,%2\n"
|
|
|
|
"mffprd %1,%0\n" :
|
|
|
|
/* temp */ "=d"(d),
|
|
|
|
/* out */ "=r"(r):
|
|
|
|
/* in */ "f"(f));
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
|
|
|
#else
|
|
|
|
|
|
|
|
// FP16 <-> FP32
|
|
|
|
// ref: https://github.com/Maratyszcza/FP16
|
|
|
|
|
|
|
|
static inline float fp32_from_bits(uint32_t w) {
|
|
|
|
union {
|
|
|
|
uint32_t as_bits;
|
|
|
|
float as_value;
|
|
|
|
} fp32;
|
|
|
|
fp32.as_bits = w;
|
|
|
|
return fp32.as_value;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline uint32_t fp32_to_bits(float f) {
|
|
|
|
union {
|
|
|
|
float as_value;
|
|
|
|
uint32_t as_bits;
|
|
|
|
} fp32;
|
|
|
|
fp32.as_value = f;
|
|
|
|
return fp32.as_bits;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline float ggml_compute_fp16_to_fp32(ggml_fp16_t h) {
|
|
|
|
const uint32_t w = (uint32_t) h << 16;
|
|
|
|
const uint32_t sign = w & UINT32_C(0x80000000);
|
|
|
|
const uint32_t two_w = w + w;
|
|
|
|
|
|
|
|
const uint32_t exp_offset = UINT32_C(0xE0) << 23;
|
|
|
|
#if defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 199901L) || defined(__GNUC__) && !defined(__STRICT_ANSI__)
|
|
|
|
const float exp_scale = 0x1.0p-112f;
|
|
|
|
#else
|
|
|
|
const float exp_scale = fp32_from_bits(UINT32_C(0x7800000));
|
|
|
|
#endif
|
|
|
|
const float normalized_value = fp32_from_bits((two_w >> 4) + exp_offset) * exp_scale;
|
|
|
|
|
|
|
|
const uint32_t magic_mask = UINT32_C(126) << 23;
|
|
|
|
const float magic_bias = 0.5f;
|
|
|
|
const float denormalized_value = fp32_from_bits((two_w >> 17) | magic_mask) - magic_bias;
|
|
|
|
|
|
|
|
const uint32_t denormalized_cutoff = UINT32_C(1) << 27;
|
|
|
|
const uint32_t result = sign |
|
|
|
|
(two_w < denormalized_cutoff ? fp32_to_bits(denormalized_value) : fp32_to_bits(normalized_value));
|
|
|
|
return fp32_from_bits(result);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline ggml_fp16_t ggml_compute_fp32_to_fp16(float f) {
|
|
|
|
#if defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 199901L) || defined(__GNUC__) && !defined(__STRICT_ANSI__)
|
|
|
|
const float scale_to_inf = 0x1.0p+112f;
|
|
|
|
const float scale_to_zero = 0x1.0p-110f;
|
|
|
|
#else
|
|
|
|
const float scale_to_inf = fp32_from_bits(UINT32_C(0x77800000));
|
|
|
|
const float scale_to_zero = fp32_from_bits(UINT32_C(0x08800000));
|
|
|
|
#endif
|
|
|
|
float base = (fabsf(f) * scale_to_inf) * scale_to_zero;
|
|
|
|
|
|
|
|
const uint32_t w = fp32_to_bits(f);
|
|
|
|
const uint32_t shl1_w = w + w;
|
|
|
|
const uint32_t sign = w & UINT32_C(0x80000000);
|
|
|
|
uint32_t bias = shl1_w & UINT32_C(0xFF000000);
|
|
|
|
if (bias < UINT32_C(0x71000000)) {
|
|
|
|
bias = UINT32_C(0x71000000);
|
|
|
|
}
|
|
|
|
|
|
|
|
base = fp32_from_bits((bias >> 1) + UINT32_C(0x07800000)) + base;
|
|
|
|
const uint32_t bits = fp32_to_bits(base);
|
|
|
|
const uint32_t exp_bits = (bits >> 13) & UINT32_C(0x00007C00);
|
|
|
|
const uint32_t mantissa_bits = bits & UINT32_C(0x00000FFF);
|
|
|
|
const uint32_t nonsign = exp_bits + mantissa_bits;
|
|
|
|
return (sign >> 16) | (shl1_w > UINT32_C(0xFF000000) ? UINT16_C(0x7E00) : nonsign);
|
|
|
|
}
|
|
|
|
|
|
|
|
#define GGML_COMPUTE_FP16_TO_FP32(x) ggml_compute_fp16_to_fp32(x)
|
|
|
|
#define GGML_COMPUTE_FP32_TO_FP16(x) ggml_compute_fp32_to_fp16(x)
|
|
|
|
|
|
|
|
#endif // __F16C__
|
|
|
|
|
2024-04-24 11:00:07 +02:00
|
|
|
#endif // defined(__ARM_NEON) && (!defined(__MSC_VER)
|
2023-11-03 20:35:05 +01:00
|
|
|
|
|
|
|
// precomputed f32 table for f16 (256 KB)
|
|
|
|
// defined in ggml.c, initialized in ggml_init()
|
|
|
|
extern float ggml_table_f32_f16[1 << 16];
|
|
|
|
|
|
|
|
// On ARM NEON, it's quicker to directly convert x -> x instead of calling into ggml_lookup_fp16_to_fp32,
|
|
|
|
// so we define GGML_FP16_TO_FP32 and GGML_FP32_TO_FP16 elsewhere for NEON.
|
|
|
|
// This is also true for POWER9.
|
2024-02-22 22:21:39 +01:00
|
|
|
#if !defined(GGML_FP16_TO_FP32)
|
2023-11-03 20:35:05 +01:00
|
|
|
inline static float ggml_lookup_fp16_to_fp32(ggml_fp16_t f) {
|
|
|
|
uint16_t s;
|
|
|
|
memcpy(&s, &f, sizeof(uint16_t));
|
|
|
|
return ggml_table_f32_f16[s];
|
|
|
|
}
|
|
|
|
|
|
|
|
#define GGML_FP16_TO_FP32(x) ggml_lookup_fp16_to_fp32(x)
|
2024-02-22 22:21:39 +01:00
|
|
|
#endif
|
2023-11-03 20:35:05 +01:00
|
|
|
|
2024-02-22 22:21:39 +01:00
|
|
|
#if !defined(GGML_FP32_TO_FP16)
|
|
|
|
#define GGML_FP32_TO_FP16(x) GGML_COMPUTE_FP32_TO_FP16(x)
|
2023-11-03 20:35:05 +01:00
|
|
|
#endif
|
|
|
|
|
|
|
|
#define GGML_HASHTABLE_FULL ((size_t)-1)
|
|
|
|
#define GGML_HASHTABLE_ALREADY_EXISTS ((size_t)-2)
|
|
|
|
|
2024-01-12 20:07:38 +01:00
|
|
|
struct ggml_hash_set ggml_hash_set_new(size_t size);
|
|
|
|
|
2023-11-03 20:35:05 +01:00
|
|
|
bool ggml_hash_contains (const struct ggml_hash_set hash_set, struct ggml_tensor * key);
|
|
|
|
|
|
|
|
// returns GGML_HASHTABLE_FULL if table is full, otherwise the current index of the key or where it should be inserted
|
|
|
|
size_t ggml_hash_find (const struct ggml_hash_set hash_set, struct ggml_tensor * key);
|
|
|
|
|
2023-12-07 21:27:19 +01:00
|
|
|
// returns GGML_HASHTABLE_ALREADY_EXISTS if key already exists, index otherwise, asserts if table is full
|
2023-11-03 20:35:05 +01:00
|
|
|
size_t ggml_hash_insert ( struct ggml_hash_set hash_set, struct ggml_tensor * key);
|
|
|
|
|
|
|
|
// return index, asserts if table is full
|
|
|
|
size_t ggml_hash_find_or_insert( struct ggml_hash_set hash_set, struct ggml_tensor * key);
|
|
|
|
|
|
|
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#ifdef __cplusplus
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}
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#endif
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