mirror of
https://github.com/ggerganov/whisper.cpp.git
synced 2025-08-19 06:17:03 +02:00
whisper : add full CUDA and Metal offloading (#1472)
* whisper : migrate to ggml-backend * whisper : fix logit reading * whisper : fix tensor allocation during load * whisper : fix beam-search with CUDA * whisper : free backends + fix compile warning * whisper : print when CUDA is enabled * whisper : fix CoreML * make : clean-up * talk : fix compile warning * whisper : support ggml_conv with CUDA and Metal (#1473) * ggml : add CUDA support for ggml_conv * whisper : remove ggml_repeat for conv bias + single backend * cuda : fix im2col kernel * metal : add im2col support + mul mat-vec f16 x f16 * bench-all : add q4 models * whisper : clean-up * quantize-all : fix * ggml : im2col opts * whisper : avoid whisper_model_data wrapper * whisper : add note that ggml_mul_mat_pad does not work with CUDA * whisper : factor out graph compute in common function * whisper : fixes * whisper : fix UB with measure buffers * whisper : try to fix the parallel whisper_state functionality (#1479) * whisper : try to fix the parallel whisper_state functionality * whisper : fix multi-state Metal * whisper : free backend instances in whisper_state
This commit is contained in:
96
ggml-cuda.cu
96
ggml-cuda.cu
@@ -4476,6 +4476,13 @@ static __device__ void cpy_1_f32_f16(const char * cxi, char * cdsti) {
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*dsti = __float2half(*xi);
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}
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static __device__ void cpy_1_f16_f16(const char * cxi, char * cdsti) {
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const half * xi = (const half *) cxi;
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half * dsti = (half *) cdsti;
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*dsti = *xi;
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}
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template <cpy_kernel_t cpy_1>
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static __global__ void cpy_f32_f16(const char * cx, char * cdst, const int ne,
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const int ne00, const int ne01, const int nb00, const int nb01, const int nb02,
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@@ -4729,6 +4736,25 @@ static __global__ void clamp_f32(const float * x, float * dst, const float min,
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dst[i] = x[i] < min ? min : (x[i] > max ? max : x[i]);
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}
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static __global__ void im2col_f32_f16(
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const float * x, half * dst,
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int ofs0, int ofs1, int IW, int IH, int CHW,
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int s0, int s1, int p0, int p1, int d0, int d1) {
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const int iiw = blockIdx.z * s0 + threadIdx.z * d0 - p0;
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const int iih = blockIdx.y * s1 + threadIdx.y * d1 - p1;
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const int offset_dst =
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(threadIdx.x * gridDim.y * gridDim.z + blockIdx.y * gridDim.z + blockIdx.z) * CHW +
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(blockIdx.x * (blockDim.y * blockDim.z) + threadIdx.y * blockDim.z + threadIdx.z);
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if (iih < 0 || iih >= IH || iiw < 0 || iiw >= IW) {
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dst[offset_dst] = __float2half(0.0f);
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} else {
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const int offset_src = threadIdx.x * ofs0 + blockIdx.x * ofs1;
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dst[offset_dst] = __float2half(x[offset_src + iih * IW + iiw]);
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}
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}
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template<int qk, int qr, dequantize_kernel_t dq>
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static void get_rows_cuda(const void * x, const int32_t * y, float * dst, const int nrows, const int ncols, cudaStream_t stream) {
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const dim3 block_dims(CUDA_GET_ROWS_BLOCK_SIZE, 1, 1);
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@@ -5618,6 +5644,16 @@ static void ggml_cpy_f32_f16_cuda(
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(cx, cdst, ne, ne00, ne01, nb00, nb01, nb02, ne10, ne11, nb10, nb11, nb12);
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}
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static void ggml_cpy_f16_f16_cuda(
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const char * cx, char * cdst, const int ne,
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const int ne00, const int ne01, const int nb00, const int nb01, const int nb02,
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const int ne10, const int ne11, const int nb10, const int nb11, const int nb12, cudaStream_t stream) {
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const int num_blocks = (ne + CUDA_CPY_BLOCK_SIZE - 1) / CUDA_CPY_BLOCK_SIZE;
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cpy_f32_f16<cpy_1_f16_f16><<<num_blocks, CUDA_CPY_BLOCK_SIZE, 0, stream>>>
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(cx, cdst, ne, ne00, ne01, nb00, nb01, nb02, ne10, ne11, nb10, nb11, nb12);
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}
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static void scale_f32_cuda(const float * x, float * dst, const float scale, const int k, cudaStream_t stream) {
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const int num_blocks = (k + CUDA_SCALE_BLOCK_SIZE - 1) / CUDA_SCALE_BLOCK_SIZE;
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scale_f32<<<num_blocks, CUDA_SCALE_BLOCK_SIZE, 0, stream>>>(x, dst, scale, k);
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@@ -5701,6 +5737,15 @@ static void soft_max_f32_cuda(const float * x, float * dst, const int ncols_x, c
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soft_max_f32<<<block_nums, block_dims, 0, stream>>>(x, dst, ncols_x);
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}
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static void im2col_f32_f16_cuda(const float * x, half * dst,
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int OH, int IW, int IH, int OW, int IC,
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int KH, int KW, int N, int ofs0, int ofs1,
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int s0, int s1, int p0, int p1, int d0, int d1, cudaStream_t stream) {
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dim3 block_nums(IC, OH, OW);
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dim3 block_dims(N, KH, KW);
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im2col_f32_f16<<<block_nums, block_dims, 0, stream>>>(x, dst, ofs0, ofs1, IW, IH, (IC * KH * KW), s0, s1, p0, p1, d0, d1);
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}
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// buffer pool for cuda
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#define MAX_CUDA_BUFFERS 256
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@@ -6483,7 +6528,7 @@ inline void ggml_cuda_op_mul_mat_cublas(
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src1_as_f16 = (half *) ggml_cuda_pool_malloc_async(ne * sizeof(half), &src1_as, id, stream);
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to_fp16_cuda(src1_ddf_i, src1_as_f16, ne, stream);
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}
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const half * src1_ptr = src1->type == GGML_TYPE_F16 ? (const half *) src1_ddq_i : src1_as_f16;
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const half * src1_ptr = src1->type == GGML_TYPE_F16 ? (const half *) src1_ddf_i : src1_as_f16;
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size_t dst_f16_as = 0;
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half * dst_f16 = (half *) ggml_cuda_pool_malloc_async(row_diff*src1_ncols * sizeof(half), &dst_f16_as, id, stream);
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@@ -6659,6 +6704,45 @@ inline void ggml_cuda_op_alibi(
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(void) src1_dd;
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}
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inline void ggml_cuda_op_im2col(
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const ggml_tensor * src0, const ggml_tensor * src1, ggml_tensor * dst,
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const float * src0_dd, const float * src1_dd, float * dst_dd, const cudaStream_t & main_stream) {
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GGML_ASSERT(src0->type == GGML_TYPE_F16);
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GGML_ASSERT(src1->type == GGML_TYPE_F32);
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GGML_ASSERT( dst->type == GGML_TYPE_F16);
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const int32_t s0 = ((const int32_t*)(dst->op_params))[0];
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const int32_t s1 = ((const int32_t*)(dst->op_params))[1];
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const int32_t p0 = ((const int32_t*)(dst->op_params))[2];
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const int32_t p1 = ((const int32_t*)(dst->op_params))[3];
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const int32_t d0 = ((const int32_t*)(dst->op_params))[4];
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const int32_t d1 = ((const int32_t*)(dst->op_params))[5];
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const bool is_2D = ((const int32_t*)(dst->op_params))[6] == 1;
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const int64_t N = src1->ne[is_2D ? 3 : 2];
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const int64_t IC = src1->ne[is_2D ? 2 : 1];
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const int64_t IH = is_2D ? src1->ne[1] : 1;
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const int64_t IW = src1->ne[0];
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const int64_t KH = is_2D ? src0->ne[1] : 1;
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const int64_t KW = src0->ne[0];
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const int64_t OH = is_2D ? dst->ne[2] : 1;
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const int64_t OW = dst->ne[1];
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const size_t ofs0 = src1->nb[is_2D ? 3 : 2] / 4; // nb is byte offset, src is type float32
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const size_t ofs1 = src1->nb[is_2D ? 2 : 1] / 4; // nb is byte offset, src is type float32
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im2col_f32_f16_cuda(src1_dd, (half*) dst_dd,
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OH, IW, IH, OW, IC, KH, KW, N,
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ofs0, ofs1, s0, s1, p0, p1, d0, d1, main_stream);
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(void) src0;
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(void) src0_dd;
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}
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inline void ggml_cuda_op_diag_mask_inf(
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const ggml_tensor * src0, const ggml_tensor * src1, ggml_tensor * dst,
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const float * src0_dd, const float * src1_dd, float * dst_dd, const cudaStream_t & main_stream) {
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@@ -7549,6 +7633,9 @@ static void ggml_cuda_cpy(const ggml_tensor * src0, const ggml_tensor * src1, gg
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} else if (src0->type == GGML_TYPE_F32 && src1->type == GGML_TYPE_F16) {
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ggml_cpy_f32_f16_cuda(src0_ddc, src1_ddc, ne, ne00, ne01, nb00, nb01, nb02,
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ne10, ne11, nb10, nb11, nb12, main_stream);
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} else if (src0->type == GGML_TYPE_F16 && src1->type == GGML_TYPE_F16) {
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ggml_cpy_f16_f16_cuda(src0_ddc, src1_ddc, ne, ne00, ne01, nb00, nb01, nb02,
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ne10, ne11, nb10, nb11, nb12, main_stream);
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} else {
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fprintf(stderr, "%s: unsupported type combination (%s to %s)\n", __func__,
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ggml_type_name(src0->type), ggml_type_name(src1->type));
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@@ -7580,6 +7667,10 @@ static void ggml_cuda_alibi(const ggml_tensor * src0, const ggml_tensor * src1,
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ggml_cuda_op_flatten(src0, src1, dst, ggml_cuda_op_alibi);
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}
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void ggml_cuda_im2col(const ggml_tensor * src0, const ggml_tensor * src1, ggml_tensor * dst) {
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ggml_cuda_op_flatten(src0, src1, dst, ggml_cuda_op_im2col);
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}
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static void ggml_cuda_nop(const ggml_tensor * src0, const ggml_tensor * src1, ggml_tensor * dst) {
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(void) src0;
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(void) src1;
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@@ -7943,6 +8034,9 @@ bool ggml_cuda_compute_forward(struct ggml_compute_params * params, struct ggml_
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case GGML_OP_ALIBI:
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func = ggml_cuda_alibi;
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break;
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case GGML_OP_IM2COL:
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func = ggml_cuda_im2col;
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break;
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default:
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return false;
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}
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